SEMIFIVE Starts 4nm Mass Production of HyperAccel's Bertha Inference Chip

KRW 42.3 billion in mass-production orders in six months. That is nearly double what SEMIFIVE booked in all of last year. The number sits behind a low-key September 8 disclosure: the South Korean design house has started shipping, at volume, a data-center AI inference accelerator built on Samsung Foundry's 4nm process.

HyperAccel is the buyer. Founded in Seoul in 2023, the startup designs what it calls a Language Processing Unit (LPU), silicon tuned for running large language models rather than training them. Bertha is the first of those designs to reach volume.

The milestone matters less for a single chip than for what it proves about the layer beneath the AI build-out. Design houses that once sold a one-off engineering project are now selling production.

Selling production, not just design

The older custom-silicon business ran on non-recurring engineering (NRE). A customer pays a design house to build a chip, the chip tapes out, and the relationship ends. Revenue is lumpy. Nothing compounds.

The company's pitch inverts that. It sells a turnkey line running from front-end design and verification through packaging, testing and volume manufacturing supply. When a customer commits to mass production, the design fee becomes an annuity. The company has now done it four times. A security-camera ASIC for Hanwha Vision's Wisenet 9. A high-performance computing chip for a Japanese customer. A server inference accelerator on its 14nm platform. And now Bertha.

That stack shows up in the accounts. Its first-half 2026 revenue rose 97% year over year, following a 137% jump in Q1 alone. Order intake is the leading indicator: KRW 15.6 billion in Q1, KRW 26.7 billion in Q2, a 71% step up. Overseas customers took 45% of Q2 bookings.

Yield is the part that decides whether this works. A design that boots on a test bench is not a design that can be manufactured at a rate. Someone has to hold the ramp-up risk, and in a turnkey agreement that risk lands on the design house.

A 500 mm² die is where the yield math turns

Die size is the quiet constraint. Bertha's package is a Big Die of more than 500 mm², and defects per wafer scale with area. Power delivery, heat dissipation and yield stop being second-order concerns. On a 4nm node those effects compound, because the transistor density that makes a chip fast also concentrates its heat.

The published targets are aggressive. HyperAccel lists the Bertha 500 at 768 trillion operations per second (TFLOPS), 546 GB/s of memory bandwidth, support for 1,024 concurrent inference requests, and roughly 90% hardware utilization. Samsung's process carries the transistor count. SEMIFIVE's job was to make the yield curve hold at volume.

That is also why SEMIFIVE's position as a Samsung Advanced Foundry Ecosystem (SAFE) partner matters. Advanced-node capacity is scarce and allocated by relationship as much as by contract. A design house that can move a customer's chip through a leading-edge fab, without the customer owning the fab relationship, is selling access as much as engineering.

The path was not quick. The two companies announced their collaboration in January 2024, signed a mass-production contract that October, and aimed for first output in Q1 2026. Actual volume began in September 2026, two quarters late. Slippage of that size on a leading-edge Big Die is ordinary, not alarming. It is also the reason turnkey work commands a premium.

Inference is where the silicon war moved

The broader shift is not subtle. Training a frontier model is a handful of very large jobs. Using one is millions of small ones. Inference, the act of running a trained model, is now the dominant workload, and it stresses different parts of a machine: memory bandwidth, batch throughput, and latency under load.

That has pulled custom silicon out of the margins. Meta has moved an accelerator of its own into production. OpenAI has an inference chip in flight. Nvidia, which still owns most of the market, agreed in early September to buy Hugging Face for $12.9 billion, placing the default distribution platform for open models inside the dominant chip vendor.

As we wrote in September, inference flipped from an afterthought into the main event. Bertha is a bet on the same premise, executed one layer down: not which model serves the request, but which piece of silicon runs it.

HyperAccel raised about $37.7 million in a Series A in December 2024, backed by a roster of Korean institutions including Industrial Bank of Korea, KB Investment and Mirae Asset. Its chief executive, Joo-Young Kim, is a professor at KAIST. The company's earlier pitch claimed up to twice the performance and 19 times the price-performance of a graphics processing unit (GPU). Those are company figures, not audited benchmarks, and volume deployment is where they get tested.

"We are delighted to work with SEMIFIVE, a leading provider of system-on-chip platforms and comprehensive ASIC design solutions, for the development of Bertha to be mass-produced."— Joo-Young Kim, CEO, HyperAccel

Does the custom-silicon window stay open, or do the buyers take it in-house?

Development scenarios