$312 million for a chip that ships in 2027. That is the arithmetic behind OLIX, a London startup betting that the physics of light can break the memory bottleneck strangling AI inference. The money moved on August 3. The hardware lands in the second half of next year. In between sits a supply-chain bet that runs against every trend line in the industry.

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OLIX raised $312M in Series B at a $3.3B valuation, more than tripling its value from February, to build chips dedicated to the decode stage of AI inference.

The DX-1 accelerator replaces high-bandwidth memory (HBM) with on-chip SRAM and links racks through a proprietary photonic interconnect, skipping the two components the industry is shortest of.

First customer systems are promised for H2 2027. Every performance figure published so far is the company's own, with no independent measurements to verify it.

The inference bottleneck that spawned a chip startup

Training captured the headlines for years. The quiet problem is the opposite end: running models in production, over and over, for real users. As agents and reasoning models spread, inference now drives the compute and energy bill more than training does. Dealroom counts about $8.3 billion raised by AI chip startups worldwide in 2026 alone, most of it aimed at exactly this stage.

OLIX's founder, James Dacombe, built his first company, the neurotechnology firm CoMind, as a teenager. That business raised roughly $100 million for non-invasive optical brain monitoring. In 2024 he started the company, initially under the name Flux Computing, to attack what he calls the next bottleneck in frontier AI: the infrastructure that serves models to users.

The company is 70 people and hiring. It plans to reach more than 200 this year, across London, Bristol, Austin, Toronto and San Francisco.

The DX-1 bet: SRAM instead of HBM

Inference has stages. A model reads the prompt, then reasons, then generates tokens one at a time. The last stage, decode, is where a model produces its answer, and it is memory-hungry and latency-sensitive. The company's first chip, DX-1, is a decode accelerator within its X-1 platform. It does one job and does it narrowly.

The bet is architectural. DX-1 holds the model in fast on-chip static random-access memory (SRAM) rather than high-bandwidth memory (HBM), the memory standard that anchors every Nvidia GPU data center. That choice removes two supply-chain headaches at once: HBM itself and advanced packaging, the same components that have rationed the industry for two years.

For 100-billion-parameter models, it claims DX-1 delivers more than 10,000 tokens per second per user at higher output throughput per watt than general-purpose chips running large batches. It says the architecture scales to models of 10 trillion parameters and beyond via a multi-rack scale-up design.

10,000+ tokens/sec/user

Claimed DX-1 decode throughput

The company's figure for 100B-parameter models on its SRAM-based decode accelerator (company-published, not independently measured) · EU-Startups, 2026

None of these numbers have been verified outside the company. Trending Topics, which covered the round, notes there are no independent measurements so far. The claims are internally consistent and plausible on paper. They are also exactly the shape of claims the chip industry has learned to treat with care.

Photons move the tokens

The second pillar is optics. Instead of copper traces, it links its accelerators with a proprietary photonic interconnect that transfers data between chips using light. The company calls the approach slow and wide, a deliberate contrast to the fast, narrow electrical links that dominate today's systems.

The stated scale is what catches the eye: an optical die-to-die network designed to interconnect more than 100,000 chips across racks. A deterministic compiler schedules workloads across the whole fabric, deciding which chip does what and when. The combination of specialized silicon per inference stage, photonic data movement and compiler-controlled scheduling is a full redesign of the data center, not an incremental accelerator.

The optics bet comes with pedigree. Professor Nick McKeown, co-inventor of software-defined networking, OpenFlow and the P4 programming language, joined the board. McKeown built Nicira, acquired by VMware, and Barefoot Networks, acquired by Intel, where he later ran Intel's networking business. For a company whose whole pitch is that data movement is the real problem, that is a pointed hire.

The money and the people

The round was led by New York growth firm Fundomo. Arm, Hudson River Trading and Netflix co-founder Reed Hastings participated as new investors. Existing backers, including Hummingbird Ventures, Crane, Plural, Creandum, Phoenix Court and Transition, increased their commitments. The UK government's Sovereign AI venture fund also invested.

The valuation tripled from $1 billion in February to $3.3 billion now. Between the two rounds, the company changed its name, grew from founding team to 70 employees, and named its first product. That is a fast trajectory, and the market is pricing the risk accordingly.

The company also hired Matt Briers, the former Wise CFO who took the fintech through its 2021 direct listing on the London Stock Exchange, as its new chief financial officer. The signal is clear: this company intends to be a scaled manufacturer with real financial discipline, not a research project.

What the round doesn't prove

The competitive field is not empty. Nvidia bought the assets of inference startup Groq in a $20 billion deal in December and has since put $4 billion into photonics companies. Cerebras raised $1 billion at a $23 billion valuation. d-Matrix took $275 million in a Series C. Etched, another inference-focused chip firm, raised $300 million at a $10.3 billion valuation in July, a month before OLIX's round.

Its differentiation is narrow and defensible in theory: it is not competing on raw arithmetic but on the economics of moving data and on dodging the memory supply chain. The HBM shortage is real, and a design that scales without it has a durable moat if the performance claims hold.

As we wrote in August, custom inference silicon is the ground where the ASIC-vs-GPU cost-per-token war is being fought. Its wager is that the war is won on memory and interconnect, not on transistor count.

The timeline is the honest disclosure. First customer deliveries land in H2 2027. In chip development, eighteen months of engineering between a Series B and first systems is compressed. The window between the promise and the proof is where valuations either earn themselves or deflate.

Can a two-year-old chip startup dislodge Nvidia's inference moat by 2028?

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By the end of 2028, OLIX will have shipped DX-1 to paying customers, but Nvidia will still hold more than 60% of inference silicon revenue.

Probability: 75% — a single startup with no shipped product and no independent benchmarks rarely displaces a platform incumbent on a two-year cycle; the realistic outcome is a credible third source of inference capacity, not a takeover.

✅ Arguments for

The HBM and advanced packaging shortage is structural, not cyclical, and the startup is engineered to bypass both.

Photonic interconnect removes the scaling ceiling that electrical links impose on large clusters, a durable moat as models grow.

Confirmation criteria: independent benchmarks of DX-1 against H100/B200-class systems appear before H2 2027, and at least one hyperscaler signs a deployment deal within six months of first silicon.

❌ Arguments against

Every headline number is company-published, and inference hardware has a long history of benchmark promises that shrink on real workloads.

Nvidia's response capacity is enormous: it already owns Groq's assets and has $4B parked in photonics, the exact technology OLIX is betting on.

Disconfirmation criteria: DX-1 slips past H2 2027, or first independent benchmarks show performance below general-purpose GPUs at comparable cost.
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Key signals to track

Independent DX-1 benchmarks vs. current-generation GPUs, any reputable third-party measurement, positive or negative

The first named customer and whether it is a hyperscaler, an enterprise, or a sovereign AI project

HBM spot pricing and advanced packaging capacity, the two constraints it is designed to ignore

Whether Nvidia's own photonics investments ship as competitive interconnect products

Development scenarios

🟢 Optimistic scenario (20%)

DX-1 ships on time in H2 2027, independent benchmarks confirm the throughput-per-watt claims, and a hyperscaler commits. The photonic interconnect becomes the proof point that the industry's scaling model is wrong.

Implications: OLIX becomes a legitimate third pole in inference hardware alongside Nvidia and Cerebras, and photonics moves from niche to mainstream in data center architecture.

🟡 Base-case scenario (55%)

DX-1 reaches customers in H2 2027 with performance close to claims, winning a niche in decode-heavy, latency-sensitive workloads and sovereign AI deployments. Nvidia remains dominant but OLIX establishes revenue and a defensible niche.

Implications: A successful focused player: meaningful revenue by 2029, further capital at higher valuations, and a growing role in UK sovereign compute strategy.

🔴 Pessimistic scenario (25%)

The photonic interconnect hits engineering delays, independent benchmarks underperform, or Nvidia's photonics acquisitions compress the competitive window. DX-1 slips into 2028 and the HBM shortage eases, undercutting the core thesis.

Implications: Valuation resets as the $3.3B price reflected scarcity economics that no longer hold; the company refocuses or is absorbed at a discount.

Sources

OLIX Raises $312M to Build Photonic Inference Platform
Round details, DX-1 decode accelerator, SRAM-vs-HBM architecture, photonic interconnect, McKeown and Briers appointments.
The most complete technical breakdown of the DX-1 architecture and the investor syndicate.
Chip startup Olix raises $312m at $3.3bn valuation, backed by UK govt Sovereign AI venture fund
Valuation tripling from February, the Sovereign AI fund participation, and the H2 2027 customer delivery timeline.
Confirms the round size, valuation math, and the strategic role of the UK government investor.
UK AI chip startup OLIX raises €270.5 million at €2.8 billion valuation just two years after its founding
The 10,000 tokens-per-second claim for 100B models, 10-trillion-parameter scaling, and the deterministic compiler scheduling.
Primary source for the performance figures and the rack-scale compiler architecture.