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# Celero's $275M Round: Coherent Optics and the AI Interconnect Bottleneck
- URL: https://nexi.fund/celero-coherent-optics-ai-interconnect-2026/
- Published: 2026-09-15T07:03:08.000Z
- Updated: 2026-09-15T07:03:08.000Z
- Description: Networking is now the binding constraint on AI build-outs, and Celero's $275 million Series C is the clearest sign. The Irvine startup says its 2nm coherent DSP silicon scales optical links from 1.6T toward 3.2T as clusters outgrow a single site.
- Author: Nexi.fund Labs
- Tags: AI & Infrastructure, #mode-1, #hook-question, #track-E, #brand-heavy

What breaks first when an AI cluster outgrows the building that holds it?

The accelerators are fine. They keep arriving, and the capital keeps chasing them. The strain shows up in the wiring, in optical links asked to carry more data, farther, on less power than the transceivers they replaced were ever designed to handle.

The fabric is the constraint.

Celero Communications put a number on that shift on September 8, 2026\. The Irvine company raised $275 million in Series C funding at a valuation above $3 billion, and said it had validated the industry's first 2-nanometer coherent digital signal processor (DSP) silicon. That DSP is the chip inside an optical transceiver that turns a GPU's electrical output into pulses of light.

🎯

Networking is now the binding constraint on AI build-outs, and the money is moving to match.  
  
Celero's $275 million Series C, led by Atreides Management, Valor Equity Partners and CapitalG, lifts total capital to $415 million.  
  
The bet is a migration from PAM4 optics to coherent optics, scaled from 1.6T today toward 3.2T interconnects. 

$275M Series C, Sept 2026 

#### Celero's Series C round

Total capital raised reached $415 million at a valuation above $3 billion. · *Celero Communications, 2026*

## Why the network became the bottleneck

For a decade, the data centre treated networking as plumbing. Buy the fastest accelerator, add switches, let the fabric keep up. That worked while a cluster fit inside one hall.

It stopped working once clusters outgrew a single site. Training and inference systems now stretch across campuses and regions, reaching from about a kilometre to more than a hundred, to find enough power and land. The cluster still has to behave like one machine.

That constraint pushes the bottleneck into the fabric. A throttled link stalls every accelerator waiting on it, so the marginal dollar now buys bandwidth as often as it buys raw compute. Power sharpens the same pressure: optical transceivers are a growing slice of a cluster's energy budget, and every extra watt spent moving a bit is a watt not spent on inference.

Gavin Baker, the Atreides Management partner who joins Celero's board with the round, framed the change directly: "Networking is now growing faster than compute, and connectivity is one of the most critical challenges in scaling AI infrastructure."

$5.2T AI capex by 2030 

#### Projected data centre investment

McKinsey projects close to $7 trillion in global data centre investment by 2030, about $5.2 trillion of it for AI workloads. · *McKinsey & Company, cited by Celero, 2026*

## The PAM4 wall and the coherent pivot

Data-centre optics have leaned on PAM4, a four-level signalling scheme that trades reach for cost. It carried the industry from 100G to 800G. At the 1.6T and 3.2T rates AI fabrics now target, that trade turns against it: more noise, shorter reach, more power burned per bit moved.

Coherent optics takes a different route. It encodes information in the phase and amplitude of light, then recovers it with a DSP, the same principle long-haul telecom has used for years. Moved inside the data centre, it buys bandwidth density and distance at lower power. Celero's claim is that a 2nm part, pairing the DSP with advanced analog circuitry, makes that practical at the volumes hyperscalers demand.

> "AI infrastructure is rapidly outgrowing the capabilities of traditional optical interconnect architectures."— Nariman Yousefi, co-founder and CEO, Celero Communications

The trade-off is easiest to read side by side.

| Requirement at 1.6T and beyond | PAM4 optics                   | Coherent optics             |
| ------------------------------ | ----------------------------- | --------------------------- |
| **Bandwidth density**          | ◐ nearing its practical limit | ✔ built for 3.2T            |
| **Reach across campuses**      | ✗ degrades over distance      | ✔ 1 km to 100 km and beyond |
| **Power per bit**              | ◐ climbs with data rate       | ✔ the design target         |
| **Deployed base today**        | ✔ the industry standard       | ◐ early production          |

Celero Communications, 2026

## What the $275 million is buying

Celero is not a one-round story. It raised $140 million in late 2025, including a $100 million Series B led by CapitalG, and the new round lifts total capital to $415 million. Atreides Management, Valor Equity Partners and CapitalG led the Series C, with Sutter Hill Ventures and Maverick Silicon following on.

The proceeds target production readiness rather than research. The company says the 2nm DSP supports a path from 1.6T today to 3.2T interconnects, and its pitch is that coherent silicon becomes the default for scale-across links no matter which accelerator sits at either end.

#### Does every data centre need coherent optics?

Inside a single rack, short copper and PAM4 links stay cheap and adequate, and coherent engines remain costlier per port.  
  
The case sharpens once a cluster crosses buildings. Across a campus or a region, the physical limits of PAM4 bite long before the budget does, and coherent optics is the option that reaches the required distance without regenerating the signal.  
  
**Confirmation criteria:** a coherent DSP that hits volume production and lands below PAM4 on dollars per gigabit at 1.6T. 

## A funding wave, not a single round

The raise landed in the same week as a second optical-interconnect round. Ayar Labs added $150 million to its Series E on September 10, lifting its 2026 primary capital to $650 million and lifetime outside funding to just over $1 billion. Nvidia, AMD, Intel, MediaTek and Alchip were already investors; the systems builder Wiwynn joined as a strategic backer, and the company opened a design centre in Bengaluru.

As we wrote in September, [iPronics](https://nexi.fund/ipronics-optical-switching-2026) raised $125 million to make AI networks rewire themselves. Three financings in five days for companies that move data between chips is a market repricing a layer the industry long took for granted.

The incumbents are not standing still. Broadcom, Marvell and Cisco already sell the switches and optical engines these startups aim to displace, and Broadcom has demonstrated co-packaged optics aimed at the same scale-across problem. The startups are betting that a purpose-built data-centre DSP, rather than a telecom design adapted after the fact, is what wins at 3.2T.

2nm coherent DSP node 

#### First validated 2nm coherent DSP

Celero says the silicon is the industry's first coherent DSP built on a 2nm process, with advanced analog technology. · *Celero Communications, 2026*

### Where does coherent optics land by 2028?

🔮

**Coherent optics carries a material share of new cross-campus AI links by 2028, while PAM4 keeps the majority of in-rack connections. Horizon: end of 2028.**  
  
Probability: 65% — the shift to 2nm silicon and the backing of Nvidia, AMD and Alphabet make the production roadmap credible, though analysts at Third Bridge do not expect a commercial inflection in co-packaged optics before the second half of 2027\. 

#### ✅ Arguments for

Power and distance limits push scale-across clusters toward coherent links.  
  
Strategic investors on both sides of the supply chain are aligning behind the roadmap.  
  
**Confirmation criteria:** a first production 3.2T coherent DSP ships and wins a named hyperscaler design. 

#### ❌ Arguments against

Coherent ports still cost more than PAM4, and most links stay short.  
  
Manufacturing capacity, not design, is the usual failure point for optical startups.  
  
**Disconfirmation criteria:** slippage of the production date past 2028, or a hyperscaler standardising on incremental PAM4 instead. 

📊

**Key signals to track**  
  
A sampling date for Celero's production 3.2T coherent DSP.  
  
Ayar Labs' high-volume co-packaged optics ramp and its Wiwynn integration.  
  
Adoption of optical input/output inside Nvidia's rack-scale interconnect ecosystem.  
  
Whether coherent dollars per gigabit fall below PAM4 at 1.6T. 

### Development scenarios

#### 🟢 Optimistic scenario (30%)

Coherent DSPs reach volume production in 2027 and become the default for cross-campus links, with Celero and Ayar Labs holding design wins at hyperscalers.  
  
**Implications:** optical silicon becomes a distinct investment category, and the startups command incumbent-like multiples. 

#### 🟡 Base-case scenario (50%)

The migration proceeds unevenly. PAM4 and copper hold the rack, coherent optics takes the campus and regional links, and adoption follows whichever interconnect standard the large cloud buyers settle on.  
  
**Implications:** steady growth, but the winners are decided by manufacturing execution rather than design. 

#### 🔴 Pessimistic scenario (20%)

Thermal and integration problems delay co-packaged optics, standards fragment, and improved pluggable PAM4 modules keep the majority of the market well past 2028.  
  
**Implications:** the funded startups burn through their rounds waiting for a transition that arrives late, and consolidation follows. 

[ Celero Communications Raises $275 Million Series C Following Validation of Industry's First 2nm Coherent DSP Silicon The company's announcement of the round, the $415 million total raised and the 2nm coherent DSP milestone. Business Wire via Morningstar ](https://www.morningstar.com/news/business-wire/20260908708759/celero-communications-raises-275-million-series-c-following-validation-of-industrys-first-2nm-coherent-dsp-silicon?ref=nexi.fund) 

The primary account of the round, the investor list and the technology claim.

[ Ayar Labs bags $150M in additional late-stage funding to help make bigger AI chip clusters The same-week peer round, with the funding totals, the investor list and the plan to reach mass production by early 2028. SiliconANGLE ](https://siliconangle.com/2026/09/10/ayar-labs-bags-150m-in-additional-series-e-funding-to-help-make-bigger-ai-chip-clusters?ref=nexi.fund) 

The best evidence that Celero's round is a sector signal, not an isolated deal.

[ Optical interconnect startup Ayar Labs closes $500m funding round backed by Nvidia and AMD Background on the co-packaged optics approach and the strategic chipmaker investors backing the interconnect layer. Data Center Dynamics ](https://www.datacenterdynamics.com/en/news/optical-interconnect-startup-ayar-labs-closes-500m-funding-round-backed-by-nvidia-and-amd/?ref=nexi.fund) 

Context on why the accelerator vendors are underwriting their own interconnect suppliers.